This invention pertains to a temperature and process variation compensation technique and a circuit incorporating said technique for use in processing a stream of control signal bits. The control signal data stream is filtered, buffered an exponentialed. The processing serves for use in a delta modulation decoder integrated circuit for high quality audio systems. The integrated circuit of this invention is a decoder for the receiver of a digital audio broadcasting system, the decoder having input logic and linear circuits capable of decoding two channels of delta modulated digital data.
The decoder receives three data bit streams that represent the audio information to be decoded. Two of these streams are control data bits, while one stream is the audio data bit stream. Clock bits are also received by the decoder. Each of the three data bit streams can be several channels of time multiplexed data. The clock is used as a strobe to select two of the channels . The circuit disclosed herein is suitable for the decoder.
The input logic of the decoder includes a number of edge triggered D flip-fops which are used as input latches to store the two channels of audio and control data.
The two control data bit streams for each channel are for step-size and system de-emphasis control. A current I.sub.SS is used to generate the amplitude of the output signal. A current I.sub.SB is used to control the frequency response. Since both currents are generated by the same circuit, this specification will discuss only one of them, I.sub.SS. Information for the control data is encoded logarithmically in the duty cycle of the bit stream. For each of the control data bit streams, a three-pole, 80 Hz., low-pass filter is used to detect the average or DC value of the duty cycle. The resulting control voltage is then exponentiated to expand the control signal into a 48 dB range.